PhD Student at the University of Toronto
I am a PhD student in the department of Electrical and Computer Engineering at the University of Toronto under the supervision of Prof. Vaughn Betz. My research interests are the intersection of FPGA architecture/CAD and AI acceleration. I am a post-graduate affiliate of the Intel/VMware Crossroads 3D-FPGA Academic Research Center, the Vector Institute for Artificial Intelligence, and the International Centre for Spatial Computational Learning. I am also a part-time graduate research intern in the Programmable Solutions Group CTO Office at Intel. Before starting my PhD, I was a research scientist at Intel Labs in Oregon, USA. I received my MASc in Computer Engineering from the University of Toronto in 2018, and my BSc in Electronics Engineering from the German University in Cairo in 2016.
Aug 6, 2021: I will be giving a talk as part of the Open-Source FPGA Foundation seminar series on FPGAs and deep learning. Sign up for it here!
May 14, 2021: Two full papers accepted for publication in FPL'21!
March 8, 2021: Our work on enhancing FPGAs with in-BRAM compute for deep learning was accepted for publication as a full paper in FCCM'21!
Dec 9, 2020: Our paper on deep learning security in multi-tenant cloud FPGAs was nominated for the best paper award in FPT'20!
Nov 1, 2020: Two full papers accepted for publication in FPT’20! Too bad I cannot visit Hawaii during the COVID-19 pandemic :(
Apr 10, 2020: Our work on optimizing FPGA logic blocks for deep learning arithmetic was accepted for publication in TRETS.
Oct 6, 2019: Our work on multi-FPGA acceleration of neural machine translation acceleration was accepted for publication in FPT’19!
Mar 3, 2019: Our work on FPGA and ASIC integration for persistent RNNs was accepted for publication in FCCM’19.
Nov 15, 2018: Our work on FPGA logic blocks for low-precision deep learning was accepted for publication in FPGA’19.
Nov 15, 2018: Our work on evaluating and enhancing Intel Stratix 10 FPGAs for persistent AI was accepted for a poster presentation in FPGA’19.
Aug 8, 2018: I successfully defended my MASc thesis titled “Enhancing FPGA Architecture for Efficient Deep Learning Inference”!
Jul 25, 2018: Our work on quantifying the efficiency gap between FPGA and ASIC CNN accelerators was accepted for publication in TRETS.
Apr 21, 2018: I won the Right Track CAD Graduate Scholarship for 2017-18.
May 21, 2018: Our work on low-precision DSP blocks for deep learning was accepted for publication in FPL’18.