Publications

Peer-Reviewed Publications

* indicates equal contribution

[C18] Into the Third Dimension: Architecture Exploration Tools for 3D Reconfigurable Acceleration Devices [PDF]

Andrew Boutros*, Fatemehsadat Mahmoudi*, Amin Mohaghegh*, Stephen More*, Vaughn Betz

International Conference on Field Programmable Technology (FPT), December 2023 (Acceptance Rate: 25%)

Best Paper Award


[J10] High Throughput FPGA-Based Object Detection via Algorithm-Hardware Co-Design

Anupreetham Anupreetham, Mohamed Ibrahim, Mathew Hall, Andrew Boutros, Ajay Kuzhively, Abinash Mohanty, Eriko Nurvitadhi, Vaughn Betz, Yu Cao, Jae-sun Seo

ACM Transactions on Reconfigurable Technology and Systems (TRETS), November 2023


[C17] A Whole New World: How to Architect Beyond-FPGA Reconfigurable Acceleration Devices? [PDF]

Andrew Boutros, Stephen More, Vaughn Betz

International Symposium on Field-Programmable Logic and Applications (FPL), September 2023 (Acceptance Rate: 36%)


[J9] Koios 2.0: Open-Source Deep Learning Benchmarks for FPGA Architecture and CAD Research [PDF]

Aman Arora, Andrew Boutros, Seyed Alireza Damghani, Karan Mathur, Vedant Mohanty, Tanmay Anand, Mohamed A. Elgammal, Kenneth B. Kent, Vaughn Betz, Lizy K. John

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), May 2023

[C16] Placement Optimization for NoC-Enhanced FPGAs [PDF]

Srivatsan Srinivasan*, Andrew Boutros*, Fatemehsadat Mahmoudi, Vaughn Betz

International Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2023 (Acceptance Rate: 26%)

Best Paper Nomination

[J8] A Fast and Flexible FPGA-based Accelerator for Natural Language Processing Neural Networks [PDF]

Suyeon Hur, Seongmin Na, Dongup Kwon, Joonsung Kim, Jangwoo Kim, Andrew Boutros, Eriko Nurvitadhi

Transactions on Architecture and Code Optimization (TACO), September 2022

[J7] Architecture and Application Co-Design for Beyond-FPGA Reconfigurable Acceleration Devices [PDF]

Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz

IEEE Access, September 2022

[C15] RAD-Sim: Rapid Architecture Exploration for Novel Reconfigurable Acceleration Devices [PDF][Video]

Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz

International Symposium on Field-Programmable Logic and Applications (FPL), August 2022


[J6] FPGA-based AI Smart NICs for Scalable Distributed AI Training Systems [PDF]

Rui Ma, Evangelos Georganas, Alexander Heinecke, Andrew Boutros, Eriko Nurvitadhi

IEEE Computer Architecture Letters (CAL), July 2022


[J5] Recurrent Neural Networks with Column-wise Matrix-Vector Multiplication on FPGAs [PDF]

Zhiqiang Que, Hiroki Nakahara, Eriko Nurvitadhi, Andrew Boutros, Hongxiang Fan, Chenglong Zeng, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Wayne Luk

Transactions on Very Large Scale Integration (VLSI) Systems, December 2021


[C14] Specializing for Efficiency: Customizing AI Inference Processors on FPGAs [PDF][Video]

Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz

International Conference on Microelectronics (ICM), December 2021

Best Paper Award


[C13] Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research [PDF][Video]

Aman Arora, Andrew Boutros, Daniel Rauch, Aishwarya Rajen, Aatman Borda, Seyed Alireza Damghani, Samidh Mehta, Sangram Kate, Pragnesh Patel, Kenneth B. Kent, Vaughn Betz, Lizy K. John

International Symposium on Field-Programmable Logic and Applications (FPL), August 2021 (Acceptance Rate: 22%)


[C12] End-to-End FPGA-based Object Detection Using Pipelined CNN and Non-Maximum Suppression [PDF]

Anupreetham Anupreetham, Mohamed Ibrahim, Mathew Hall, Andrew Boutros, Ajay Kuzhively, Abinash Mohanty, Eriko Nurvitadhi, Vaughn Betz, Yu Cao, Jae-sun Seo

International Symposium on Field-Programmable Logic and Applications (FPL), August 2021 (Acceptance Rate: 22%)

Best Paper Nomination


[J4] FPGA Architecture: Principles and Progression [PDF]

Andrew Boutros, Vaughn Betz

IEEE Circuits and Systems Magazine (CAS-M), May 2021


[C11] Compute-Capable Block RAMs for Efficient Deep Learning Acceleration on FPGAs [PDF]

Xiaowei Wang, Vidushi Goyal, Jiecao Yu, Valeria Bertacco, Andrew Boutros, Eriko Nurvitadhi, Charles Augustine, Ravi Iyer, Reetuparna Das

International Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2021 (Acceptance Rate: 22%)


[C10] Beyond Peak Performance: Comparing the Real Performance of AI-Optimized FPGAs and GPUs [PDF][Video] 

Andrew Boutros, Eriko Nurvitadhi, Rui Ma, Sergey Gribok, Zhipeng Zhao, James C. Hoe, Vaughn Betz, Martin Langhammer

International Conference on Field-Programmable Technology (FPT), December 2020 (Acceptance Rate: 25%)

Featured on Intel Stratix 10 NX official webpage and an Intel whitepaper 


[C9] Neighbors From Hell: Voltage Attacks Against Deep Learning Accelerators on Multi-Tenant FPGAs [PDF][Video]

Andrew Boutros, Mathew Hall, Nicolas Papernot, Vaughn Betz

International Conference on Field-Programmable Technology (FPT), December 2020 (Acceptance Rate: 25%)

Best Paper Nomination


[J3] FPGA Logic Block Architectures for Efficient Deep Learning Inference [PDF]

Mohamed Eldafrway, Andrew Boutros, Sadegh Yazdanshenas, Vaughn Betz

ACM Transactions on Reconfigurable Technology and Systems (TRETS), Vol. 13, June 2020


[C8] Scalable Low-Latency Persistent Neural Machine Translation on CPU Server with Multiple FPGAs [PDF]

Eriko Nurvitadhi, Andrew Boutros, Prerna Budhkar, Ali Jafari, Dongup Kwon, David Sheffield, Abirami Prabhakaran, Karthik Gururaj, Pranavi Appana, Mishali Naik

International Conference on Field-Programmable Technology (FPT), December 2019, Tianjin, China


[C7] Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs [PDF][Video]

Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory Chen, Phil Knag, Raghavan Kumar, Ram Krishnamurthy, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Debbie Marr, Aravind Dasu

International Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2019, San Diego, USA (Acceptance Rate: 26%)


[C6] Math Doesn’t Have to be Hard: Logic Block Architectures to Enhance Low-Precision Multiply-Accumulate on FPGAs [PDF]

Andrew Boutros*, Mohamed Eldafrawy*, Sadegh Yazdanshenas, Vaughn Betz

International Symposium on Field-Programmable Gate Arrays (FPGA), February 2019, Monterey, USA (Acceptance Rate: 19%)


[C5] Evaluating and Enhancing Intel Stratix 10 FPGAs for Persistent Real-Time Artificial Intelligence

Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory Chen, Phil Knag, Raghavan Kumar, Ram Krishnamurthy, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Debbie Marr, Aravind Dasu

International Symposium on Field-Programmable Gate Arrays (FPGA), February 2019, Monterey, USA


[J2] You Can't Improve What You Don't Measure: FPGA vs. ASIC Efficiency Gaps for CNN Inference [PDF]

Andrew Boutros, Sadegh Yazdanshenas, Vaughn Betz

ACM Transactions on Reconfigurable Technology and Systems (TRETS), Vol. 11, December 2018


[C4] Embracing Diversity: Enhanced DSP Blocks for Low-Precision Deep Learning on FPGAs [PDF]

Andrew Boutros, Sadegh Yazdanshenas, Vaughn Betz

International Conference on Field-Programmable Logic and Applications (FPL), August 2018, Dublin, Ireland (Acceptance Rate: 17%)

Stamatis Vassiliadis Best Paper Award


[C3] Build Fast, Trade Fast: FPGA-based High-Frequency Trading using High-Level Synthesis [PDF]

Andrew Boutros, Brett Grady, Mustafa Abbas, Paul Chow

International Conference on Reconfigurable Computing and FPGAs (ReConFig), December 2017, Cancun, Mexico


[C2] Hardware Acceleration of Novel Chaos-Based Image Encryption for IoT Applications [PDF]

Andrew Boutros, Salma Hesham, Barbara Georgey, Mohamed Abd El Ghany

International Conference on Microelectronics (ICM), December 2017, Beirut, Lebanon


[J1] A HW/SW Co-Design of the HOG Algorithm on Xilinx Zynq SoC [PDF]

Jens Rettkowski, Andrew Boutros, Diana Goehringer

Journal of Parallel and Distributed Computing (JPDC), Vol. 109, November 2017


[C1] Real-time Pedestrian Detection on a Xilinx Zynq using the HOG Algorithm [PDF]

Jens Rettkowski, Andrew Boutros, Diana Goehringer

International Conference on Reconfigurable Computing and FPGAs (ReConFig), December 2015, Cancun, Mexico

Best Paper Award


Book Chapters


Field-Programmable Gate Array Architecture [PDF]

Andrew Boutros, Vaughn Betz

Handbook of Computer Architecture, Springer Nature, 2022


Dissertations


Enhancing FPGA Architecture for Efficient Deep Learning Inference [PDF]

MASc Thesis, University of Toronto, August 2018

Advisor: Vaughn Betz


Pedestrian Detection based on the HOG Algorithm on a Xilinx Zynq FPGA [PDF]

BSc Thesis, German University in Cairo, July 2015

Advisor: Diana Goehringer (Ruhr University Bochum)

Recorded Talks